Institute of Microelectronics Ulm University
Automatic sizing of CT ΣΔ-ADCsBack to Start
Maximum STF Global Gains:
Minimum STF Inband Gains:
Lower STF Out-Of-Band Constraints:
Upper STF Out-Of-Band Constraints:
Maximum Out-Of-Band NTF Gain:

STF

Maximum STF global gain
dB
Minimum STF inband gains
f/fs dB
f/fs dB
f/fs dB
Lower out-of-band constraints
f/fs dB
f/fs dB
f/fs dB
f/fs dB
f/fs dB
Upper out-of-band constraints
f/fs dB
f/fs dB
f/fs dB
f/fs dB
f/fs dB

NTF

Maximum NTF Out-of-Band-Gain (OBG)
dB

Inner TF

Calculate Inner TFs
Amplitude
min.:
FS
max.:
FS
Frequency
f/fband
Duty Cycle
Input S/H
enable
Excess-loop-delay
t/Ts
FIR DAC:
Filter order:
Active coeff. (0=disable,1=enable):
Fixed coeff. values (0 means optimize coeff.):
min. values:
max. values:
Local ELD in [t/Ts]
ADC waveform
Duty cycle:
Time constant τ:
Quantizer levels
Secondary Quantizer
Levels:
Duty Cycle Primary Quant.:
Dithering
a/LSB
Desired input swing
min.:
a/FS
max.:
a/FS
Model type
Filter order:
Filter delays:
Type: resistive
Type
Value
same as a1
value:
min.:
max.:
Model type
Desired swing
min.:
a/FS
max.:
a/FS
DC-gain
minimize fixed
value (absolute):
min.:
max.:
GBW
minimize fixed
value:
[fs]
min.:
[fs]
max.:
[fs]
Proportional path
optimize fixed
value:
min.:
max.:
Resonance frequency
optimize fixed
value:
[fs]
min.:
[fs]
max.:
[fs]
Quality factor
Correction Factor
optimize fixed
value:
[factor]
min.:
[factor]
max.:
[factor]
Output resistance
g/C
DC-Gain 2
(absolute)
GBW 2 - 1st Pole
[fs]
GBW 2 - 2nd Pole
[fs]
fcenter
Choose
OSR
fs
fb
SNR Goal
dB
fcenter
Choose
OSR
fs
fb
SNR Goal
dB
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Simulation length
214 215 216

A Hanning3 window is used.