Institute of Microelectronics Ulm University
Automatic sizing of CT ΣΔ-ADCs
Maximum Global Gains:
Minimum Inband Gains:
Lower Out-Of-Band Constraints:
Upper Out-Of-Band Constraints:
Maximum STF global gain
dB
Minimum STF inband gains
f/fs dB
f/fs dB
Lower out-of-band constraints
f/fs dB
f/fs dB
f/fs dB
f/fs dB
f/fs dB
Upper out-of-band constraints
f/fs dB
f/fs dB
f/fs dB
f/fs dB
f/fs dB
Amplitude
min.:
FS
max.:
FS

Frequency
f/fband
Excess-loop-delay
t/Ts
Path:
Local ELD in [t/Ts]
ADC waveform
Duty cycle:
Time constant τ:
Quantizer levels

Dithering

Desired input swing
min.:
a/FS
max.:
a/FS
Type: resistive
Type

Value
same as a1
value:
min.:
max.:
Model type
Desired swing
min.:
a/FS
max.:
a/FS

DC-gain
minimize fixed
value (absolute):
min.:
max.:
GBW in [fs]
minimize fixed
value (in [fs]):
min.:
max.:

Proportional path
optimize fixed
value:
min.:
max.:

fcenter

Choose
OSR
fs
fb

SNR Goal
dB
fcenter

Choose
OSR
fs
fb

SNR Goal
dB
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Simulation length
214 215 216

A Hanning3 window is used.